1. Field of the Invention
The invention relates to a device to neutralize an electronic circuit when it is being powered or disconnected. It can be applied especially but not exclusively in the field of electric programmable memories.
The invention shall be described in the context of electrically programmable non-volatile memories (EEPROMs, Flash EPROMs), without thereby limiting the scope of the invention in any way.
When the supply voltage is being built up in a non-volatile memory, any operation of writing in the memory must be made impossible because otherwise there can be no certainty about the result of this operation. To this end, devices have been developed to neutralize the operation of the memory for values of supply voltage below a threshold value. This threshold value is generally determined as a function of the application of the electronic circuit to be neutralized.
2. Discussion of the Related Art
Prior art devices used to neutralize a non-volatile memory conventionally include a control circuit and a means to inhibit the operation of the memory. The control circuit delivers a power-on-reset (POR) signal that conditions the output of the inhibiting means.
The inhibiting means convert the POR control signal into a binary signal. When the voltage of the POR control signal is zero, the binary signal is at a high level. For any value of the supply voltage below the threshold voltage Vs, the output of the inhibiting means is at a low level. When the binary signal is at the high level, the write operations are permitted in the memory located downline with respect to the inhibiting means.
The POR control signal is shown in FIG. 1. It can be seen that it is superimposed on the supply voltage Vcc so long as this voltage remains below the threshold voltage Vs. Beyond this value, the value of voltage of the POR control signal is zero.
Conventionally, the inhibiting means are formed by a flip-flop circuit whose resetting terminal receives the POR control signal and whose setting terminal receives a write request signal. The binary signal coming from the inhibiting means is used to activate a high voltage generator that produces the voltages necessary for programming and erasure of the memory cells. When the supply voltage is below the threshold voltage Vs, the binary signal is at a low level and the voltage generator is then made inoperative. Any write operation in the memory is therefore impossible.
The control circuit is the key element in the neutralizing device. FIG. 2 shows a known control circuit. It has a first means 1 to set the threshold value, connected by an input to a supply terminal Vcc and by its output to a ground terminal Gnd by means of a resistor R1. This means 1 comes on when the supply voltage becomes greater than an inherent threshold voltage which, in this case, is equal to the threshold value Vs.
In the example of FIG. 2, the means 1 is formed by a P type native transistor TP1 having its source connected to the supply terminal Vcc, its drain connected to the resistor R1 and its gate connected to the ground terminal Gnd. It may be recalled that a native transistor is a transistor that has not received any additional implantation in its conduction channel. Its conduction threshold voltage is in the range of 0.2 volts for an N type transistor and 1.3 volts for a P type transistor.
The control circuit furthermore has an inverter I1 connected between the output of the means 1 and an output terminal OUT through which the control signal is delivered. A starting capacitor C1 is connected between the supply terminal Vcc and the output terminal OUT to obtain the output level expected during the beginning of the build-up of the supply voltage.
In this example, the value of the conduction threshold of the transistor TP1 represents the inherent threshold voltage of the means 1. It is also equal to the threshold value Vs.
The operation of such a control circuit is well known to those skilled in the art. To put it briefly, so long as the value of the supply voltage Vcc is below the value of the conduction threshold of the transistor TP1, the value of the voltage at the input of the inverter I1 is zero. The output terminal OUT of the device then delivers a voltage equal to the supply voltage.
However, it must be noted that the operation of the inverter I1 is disturbed below a certain level of the supply voltage. Indeed, the two transistors forming the inverter are simultaneously off. The starting capacitor C1 makes it possible to impose a voltage equal to the supply voltage on the output of the inverter I1.
As soon as the supply voltage goes beyond the threshold voltage of the transistor TP1, the voltage at the input of the inverter I1 becomes roughly equal to the supply voltage. The voltage at the output terminal OUT of the device becomes zero. Conversely, when the supply voltage goes back below the threshold voltage of the transistor TP1, the voltage at the output terminal OUT is equal to the supply voltage.
This type of device has one major drawback: the threshold voltage of the control signal may vary substantially because of variations in the parameters proper to the methods of manufacture of the transistors. The lower the nominal value of the supply voltage, the greater will be the inconvenience caused by these variations of the threshold value.
Indeed, if we consider a memory working with a supply voltage of 1.8 volts, it must be ensured that the threshold voltage of the transistor TP1 is always below 1.8 volts. Preferably, in this case, a threshold voltage will be chosen equal to 1.5 volts. Such a value would make it possible to cope with small variations in the supply voltage and ensure the efficient running of the operations for writing in the memory.
Now, in practice, if it has chosen to give the transistor TP1 a threshold voltage whose nominal value is only 1.3 volts, it may happen that this real threshold voltage goes beyond 1.8 volts under unfavorable conditions of use such as low temperature, the difference between the real threshold voltage and the nominal threshold voltage being the accumulation of the differences in value due, firstly, to the conditions of manufacture, and secondly, to the conditions of use. It can therefore be seen that it is not possible to ensure the efficient working of the device.